ChipX Overview
ChipX is a Silicon Valley-based ASIC manufacturer. We use patented technology to provide significant cost and time advantages over other ASIC vendors. ChipX serves customers throughout the electronics industry and has completed over 2,000 ASIC designs, including Structured Asic, Embedded Array ASIC and Standard Cell ASIC. The new Hybrid ASIC offering provides the industry with an opportunity to...More»
ChipX is a Silicon Valley-based ASIC manufacturer. We use patented technology to provide significant cost and time advantages over other ASIC vendors. ChipX serves customers throughout the electronics industry and has completed over 2,000 ASIC designs, including Structured Asic, Embedded Array ASIC and Standard Cell ASIC. The new Hybrid ASIC offering provides the industry with an opportunity to quickly bring entire product lines to market at a fraction of the cost and time it would take with traditional technologies. ChipX provides an extensive analog, mixed-signal and digital IP portfolio to customers, including PCI Express, USB, DAC, ADC, PLL's etc. ChipX has a solid patent portfolio and is ISO 9001 registered. The company executes ITAR designs and can provide DO-254 support.«Less
Key People
Management
Board of Directors
Funding
| Date | Type | Capital Amount | Post-Money Valuation | Investors |
|---|---|---|---|---|
| 03/04/2004 | Series E | 12M | Unknown |
Products
| Name: | CX6200 Structured ASIC |
| Product URL: | http://www.chipx.com/products/cx6200.asp |
| Description: | The CX6200 product family combines built-in, silicon proven, industry standard PHYs for USB 2.0 Hi-Speed On-the-Go (OTG) with the well-proven X-Cell™ Structured ASIC architecture, to provide industry-leading performance using the UMC eight-metal high-speed 0.13µ deep sub-micron process. Tested prototypes can be delivered in 4-5 weeks and production parts in 10-12 weeks. Key Features and Benefits * USB 2.0 HS On-the-Go PHY offers OTG, Device and Host functionality * True ASIC gate count of 140K to 1.8M usable gates * High-speed embedded SRAM of 233Kb to 1.1Mb * Granular X-Cell™ Structured ASIC architecture for maximum routability and density * Highly configurable RAM blocks of 9Kb for excellent memory use efficiency * Single port, dual port or FIFO configurations of RAM blocks * Core operating voltage 1.2V * I/O voltages of 1.5V, 1.8V, 2.5V and 3.3V * Output drive strengths of up to 16mA * Flexible I/O pads that can be power, ground, input, output or bi-directional * I/Os: LVTTL, LVCMOS, HSTL (1/2/3), SSTL (18/2/3) * I/Os (continued): 840Mb/s LVDS, RSDS, PCI, PCI-X, XOSC * 250MHz maximum global operating frequency * Six PLLs with output frequency range of 10MHz - 1GHz * Multiple DLLs with output frequency of up to 500MHz * Commercial and Industrial grade temperature libraries * Packages from 56QFN to 456PBGA USB Sub-System The built-in, silicon proven USB 2.0 HS OTG PHY, in combination with ChipX validated, synthesizable processors and USB Host, Device and OTG controllers form a complete, interoperability proven, USB sub-system capable of achieving USB-IF compliance. Customers can also use their own USB controller and processor of choice where desired. The USB sub-system on the CX6200 family of products removes complexity and risk of IP selection and IP interoperability testing, enabling faster time to market. The CX6200 product family builds on four generations of ChipX Structured ASIC products and provides the greatest level of flexibility in terms of I/O and memory configurations. Design Flow ChipX spends considerable development effort to ensure that taping out a design to a CX6200 Structured ASIC is simple, painless, and low risk. ChipX provides downloadable libraries on-line, for Magma, Synopsys, and Synplify ASIC synthesis tools. Many customers prefer to hand off their RTL designs early and let ChipX perform the entire timing closure loop, including synthesis and final simulations. ChipX can also convert obsolete design netlists into prototypes rapidly and reliably. |
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09/13/2008 02:42AM by TradeVibes
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