Verific Design Automation Inc. develops and sells source code (C++) Verilog and VHDL front-ends (parsers, analyzers, elaborators) as well as a generic hierarchical netlist database for EDA applications. Many EDA and semiconductor companies worldwide are shipping products incorporating Verific’s Verilog and VHDL technology, with a combined customer base of over 20,000 users. Applications include FPGA synthesis, Model Checking, Functional Verification, Hardware Acceleration, RTL Debug, Logic Equivalence Checking, RTL Floorplanning, HDL Entry, and Design for Test.
The Fish Pool: Fishpool Creations is a friendly and relaxed IT company founded in 1995. It specialises in script… See Company Profile »
Jasper Design Automation just raised $7 million in fourth round funding from ZenShin Capital, Cambrian Ventures, Foundation Capital and Accel… Continue reading 〉
Nusym Technology has raised $8 million in a second round of funding for its chip design verification business. The Los… Continue reading 〉